1. Field of the Invention
This invention relates to a crystal article and a method for forming the same, particularly to a crystal article having a plurality of single crystals formed on a deposition surface with their positions being controlled, and also with their positions of the grain boundaries formed at the portions where the single crystals mutually contact each other and the sizes of the single crystals being controlled and a method for forming the same.
The present invention is applicable to single crystals to be utilized for production of, for example, electronic elements such as semiconductor integrated circuits, magnetic circuits, etc., optical elements, magnetic elements, piezoelectric elements, or surface acoustic elements, etc.
2. Related Background Art
In the field of SOI technique which grows a plurality of single crystals on an insulating substrate, there has been proposed, for example, the method based on selective nucleation depending on the difference in nucleation density between the surface materials (T. Yonehara et al (1987), Extended Abstracts of the 19th SSDM. 191). The crystal formation method is to be described by referring to FIGS. 1A to 1C. First, as shown in FIG. 1A, on a substrate 201 having a surface 202 with small nucleation density are arranged regions 203a, 203b having surfaces with sufficiently larger nucleation density than the surface 202 with a diameter of a and an interval b. If a predetermined crystal formation treatment is applied on the substrate crystal nuclei of the deposited product will be generated only on the surfaces of the regions 203a, 203b, and never on the surface 202. Accordingly, the surfaces of the regions 203a, 203b are called nucleation surfaces (S.sub.NDL) and the surface 202 non nucleation surface (S.sub.NDS). If the nuclei generated on the nucleation surfaces 203a, 203b are further permitted to grow, they become the single crystals 204a, 204b (see FIGS. 1B, 1C), growing onto the non-nucleation surface 202 beyond the regions of the nucleation surfaces 203a, 203b, until contacting the single crystal 204b grown from the adjacent nucleation surface 203b to form a grain boundary 205. In the crystal formation method of the prior art, there have been reported an example, in which the nucleation surfaces 203a, 203b are formed of amorphous Si.sub.3 N.sub.4, the non-nucleation surface 202 formed of SiO.sub.2, and a plurality of Si single crystals according to the CVD method (see the above essay), and an example, in which the non-nucleation surface 202 is formed of SiO.sub.2, the region which becomes the nucleation surface 203a is formed by injecting Si ions into the non-nucleation surface 202 with a focused ion beam, and subsequently a plurality of Si single crystals are formed according to the CVD method (The 35th Associated Lectures Related to Applied Physics, 1988, 28p-M-9).
However, when these single crystals are formed in lattice points in a plurality of crystal grains according to the crystal formation method with controlled formation positions thereof, there may sometimes occur the problems as shown below and in that case, problems may sometimes occur in forming a semiconductor integrated circuit or other electronic or optical elements.
More specifically, when the nucleation surfaces 203a, 203b shown in FIGS. 1A-1C are arranged in lattice points on the non-nucleation surface 301 as shown in FIG. 2A, and the crystal growth treatment is applied thereon, the single crystals grown from the nucleation surfaces which are the nearest nucleation surfaces to the nucleation surface 302b contact the single crystal 303a to form grain boundaries 304. However, at the central portion in the interval from the second nearest nucleation surface 303c relative to the nucleation surface 302b, the single crystals cannot completely contact each other whereby a void 305 may be sometimes generated [FIG. 2B]. This void 305 may be extinguished by close contact between the upper portions of the single crystals by elongating the crystal growth treatment time, but when the upper portions of the single crystals are removed to be flattened by etching or polishing so as to form a semiconductor integrated circuit, or other elements, etc., the void 305 may be sometimes observed to appear.
On the void 305, it is impossible to form an element utilizing the characteristics of the single crystal such as MOS transistors, diodes, etc. Further, even when a thin film intended to wiring is desired to be formed on the void 305, since the film thickness of the crystal grain after flattening is some 100 .ANG. or higher, generally about 1 .mu.m from the demand in formation of the element, and from the point of controllability of flattening, when the thickness of the single crystal 303a surpasses this thickness, there also sometimes occurred wire breaking at the stepped difference portion between the void 305 and the single crystal 303a. Accordingly, when the surface portions of a plurality of single crystals formed according to the crystal formation method in which these single crystals are formed with controlled positions thereof are flattened by cutting, and a semiconductor integrated circuit or other elements, etc. are formed thereon since the active region is formed by avoiding the void 305, the circuit constitution or the element constitution is restricted as it is lowered in degree of freedom in design, or troubles may sometimes occur in miniaturization of the element.